Phase-locked loop (PLL) designs have traditionally relied on single-reference (SR) phase tracking. The SR phase tracking is therefore only capable of tracking a single reference phase. The single reference phase is generally defined as either a rising or falling edge on an incoming reference clock. In traditional designs of the prior art, ideal behavior is for the tracking phase to track exactly a fixed tracking distance (typically 2π) behind the reference phase, even when the reference phase shifts up to a high rate of change from cycle to cycle. A high tracking bandwidth is necessary to accommodate a high rate of change. High tracking bandwidth is achieved when the tracking phase moves the same distance and in the same direction as the reference phase. This “unity tracking” ideally continues with a high rate of change on the reference phase.
To achieve a high tracking bandwidth, and resulting fast acquisition times, a high loop gain is required. Unfortunately, the required high loop gain also amplifies any shifts in the incoming reference. The amplified shifts result in amplified jitter rather than an expected unity shift on the tracking phase. This phenomenon is referred to as jitter peaking. Jitter peaking becomes more pronounced as the frequency of shifts on the reference approaches the reference frequency.
To avoid the detrimental effects of jitter peaking in practical SR circuit design, high tracking bandwidth is sacrificed by adding loop filtering to dampen or reduce the high loop gain. Loop filtering therefore effectively reduces jitter peaking. However, loop filtering also results in low tracking bandwidth (and a concomitant long acquisition time) and increased jitter accumulation through the feedback loop due to lower gain.
This inherent conflict between jitter peaking and tracking bandwidth in SR phase tracking dictates that either a high tracking bandwidth goal or a low jitter peaking goal can be achieved. However, both goals cannot be achieved simultaneously.
In FIG. 1A, a closed-loop SR model 100 helps illustrate the closed-loop behavior of SR tracking. A sample shift on the incoming reference phase, θreference, is denoted as ζ and an open-loop gain value is denoted as G. An impulse function δ depicts the discrete-time sampling of SR tracking at T sample intervals (where T is the period of the reference clock) and n represents a particular sample interval over an indefinite number of samples.
Derived from FIG. 1A, equation (1) below reveals that the first derivative of tracking (indicative of tracking bandwidth) is not proportional to the rate of change of any induced jitter, as would be expected from ideal behavior. Rather, the tracking derivative is proportional to the jitter (or input shift) itself. For example, the reference jitter may have peaked and started to decrease, but tracking would be showing no jitter.
                                          θ            tracking            ′                    ⁡                      (            t            )                          =                                            f              reference                        ⁢                          G              ⁡                              [                                                                            θ                      reference                                        ⁡                                          (                      t                      )                                                        -                                                            θ                      tracking                                        (                                          t                      -                                              1                                                  f                          reference                                                                                      )                                                  ]                                              -                      2            ⁢            π            ⁢                                                  ⁢                          f              reference                        ⁢            G                    +                                    f              reference                        ⁢            G            ⁢                                                  ⁢                          ζ              ⁡                              (                t                )                                                                        (        1        )            
As the phase error (θreference−θtracking) goes to 2π (the tracking distance), the tracking has converged and equation (1) simplifies to equation (2) where only jitter (i.e., input shift) is being tracked. A high tracking bandwidth would track jitter (or real reference change) with unity gain up to a high rate of change. One difficulty can be seen in equation (2) in that any input shift is amplified by the closed-loop gain G and freference.θtracking′(t)=freferenceGζ(t)  (2)
Another difficulty in achieving high tracking bandwidth is further obvious from a summation of impulse functions (the impulse functions are denoted by ζ in equation (2)). An impulse function, a single shift of the reference phase on one clock cycle, shows that whatever amplitude the reference phase shifts to would be a phase shift at the tracking phase amplified by G and freference. Accumulating these amplified shifts, as they vary across multiple cycles, leads to jitter peaking, or large jitter shifts occurring on the tracking phase. FIG. 1B displays a related tracking diagram.
The improbability of getting an exact match between the tracking phase moving in a monotonic correspondence with the reference phase is obvious from using various functions of ζ in equation (2). An impulse function, a single shift of the reference phase on one clock cycle, would suffice to illustrate jitter amplification. Whatever amplitude the reference phase shifts to would be amplified by G and freference. Also, note that accumulating these amplified shifts across multiple cycles leads to jitter peaking, or much larger jitter shifts occurring on the tracking phase than on the reference phase. This is the main reason loop filtering is used—to keep G low, thereby reducing jitter peaking and SR tracking. However, as pointed out above, loop filtering also results in low tracking bandwidth and increased jitter accumulation.
Therefore, what is needed is a way to concurrently decrease jitter peaking and increase tracking bandwidth in a PLL design.